The University of Modena was founded in 1175, making it the third oldest university in the western world. It has just over 19.000 students and it is ranked 2nd among public universities according to Italy’s leading financial daily. It is located in the heart of one of Europe’s wealthiest and most dynamic regions, which is world-renowned for its production of mechanical parts, engines, sports cars (e.g. Ferrari and Maserati) as well as for its agro-food sector, ceramic tiles and manufacturing industries.
The High-Performance Real-Time Laboratory (HiPeRT Lab) led by Prof. Marko Bertogna, is coordinating the project. The High-Performance Real-Time Lab (HiPeRT Lab) of the University of Modena aims at creating a reference point in the research on real-time multi- and many-core systems, providing scheduling algorithms and schedulability tests for next-generation hardware architectures. HiPeRT Lab’s mission is to predictably exploit the tremendous performance/power potential offered by parallel computing platforms in application domains where timing constraints are crucial. The group has been involved in several EU project and has multiple on-going collaborations with key companies in industrial domains where real-time requirements are crucial: automotive, avionics, industrial automation, but also semantic intelligence and on-line advertising. It strongly believes in the technology transfer between academia and industry, fostering and promoting new collaborations for improving and devising the real-time systems of the future.
-Role in the project
The High-Performance Real-Time Laboratory from the University of Modena (UNIMORE) will supervise the project (WP7), and will develop resource-efficient and time-predictable algorithms for mapping tasks to threads, and scheduling the platform resources, such as cores, memory, and communication (WP5).
-On going projects:
-Books, Publications and Panels:
- Sanjoy Baruah, Marko Bertogna, Giorgio Buttazzo, “Multiprocessor Scheduling for Real-Time Systems”, Springer International Publishing, Embedded Systems Series, 2015
- Robert I. Davis, Marko Bertogna, Vincenzo Bonifaci, “On the Compatibility of Exact Schedulability Tests for Global Fixed Priority Pre-emptive Scheduling with Audsley’s Optimal Priority Assignment Algorithm”, Real-Time Systems: The International Journal of Time-Critical Computing. 52 (1): 113-122. January 2016.
- Paolo Burgio, Andrea Marongiu, Paolo Valente and Marko Bertogna. “A memory-centric approach to enable timing-predictability within embedded many-core accelerators”. Proceedings of the CSI Symposium on Real-Time and Embedded Systems and Technologies (RTEST’15), Tehran, Iran, October 2015. Best Paper Award.
- Alessandro Biondi, Giorgio C. Buttazzo, Marko Bertogna. “Supporting Component-based Development in Partitioned Multiprocessor Real-Time Systems”, Proceedings of 27th Euromicro Conference on Real-Time Systems (ECRTS 2015), Lund, Sweden, July 2015. Outstanding Paper Award.
- Maria A. Serrano, Alessandra Melani, Roberto Vargas, Andrea Marongiu, Marko Bertogna and Eduardo Quinones. “Timing Characterization of OpenMP4 Tasking Model”, Proceedings of the International Conference on Compilers, Architectures and Synthesis of Embedded Systems (CASES’15), Amsterdam, The Netherlands, October 2015.
- Alessandro Biondi, Alessandra Melani, Marko Bertogna, “Hard Constant Bandwidth Server: Comprehensive Formulation and Critical Scenarios”, Proceedings of 9th IEEE International Symposium on Industrial Embedded Systems (SIES 2014), Pisa, Italy, June 2014. Best Paper Award.
- Universita’ degli Studi di Modena e Reggio Emilia
- Dipartimento di Scienze Fisiche, Informatiche e Matematiche
- Via Campi 213/b
- 41125 Modena
- Tel: +39 059 205 5174